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How to optimize PCB design for DRV8320 and STM32G431RBT6TR to minimize vias?

Hey everyone,

I’m currently working on a PCB design involving the DRV8320 and the STM32G431RBT6TR. As you can see in the attached images, I’m trying to minimize the number of vias between these two components. Ideally, I’d like to have straight traces with minimal or no vias, maintaining the same orientation of the chips.

However, I’m finding it challenging to maintain the necessary functionality, such as BEMF detection with the Virtual Neutral Point and the different comparators for zero-crossing BEMF.

I would greatly appreciate any help or suggestions on how to change the pin assignments while keeping the required functionality intact. Your expertise and advice would be invaluable!

Thank you in advance! @Helper
file0.jpgfile1.jpg

  1. Nayel#0000
  2. Nayel#0000

    here is how it looks with all the data traces

  3. Nayel#0000

    0image.png

  4. Joseph Ogbonna#0000

    I would say putting a via in the design isn’t that much of an issue. Vias helps you navigate your route to reach other points.

  5. Nayel#0000

    Yes you’re right but in high power and high speed PCB the vias is a problem because of cross talk and current return

  6. Nayel#0000

    But from what I’ve seen I can reassign the pins

  7. Nayel#0000

    Because the other pins that share the same specification or already used or too far from the driver

  8. Afuevu#0000

    @medic4950 I would suggest you consider placing the vias properly to form a pattern, also the size of the vias matters, I see from the picture and schematic that the timer 1 is from pin 34 or so, consider rotating the driver anticlockwise

  9. medic4950#0

    Thanks for the insights!

  10. hemalchevli#0000

    hi
    sorry for the late reply, I was on holiday.

    First, I think the reset pin is missing a pullup resistor.

    Before commenting on the vias, I want to know what’s your layer stack up? I think at minimum you should use 4 layers.

    You can check out the reference designs by TI, see how they are doing the layout for the DRV chip.

    I’d add test points for all signals of interest, especially the gate drive signals.

  11. medic4950#0

    HI @hemalchevli hanks for the reply and sorry for the delay , So yes it s a 4layer pcb with 2 gnd layer core

  12. medic4950#0

    the first layer is signal and the fourth one is also a signal

  13. medic4950#0

    the thickness of the board is 1.6

  14. medic4950#0

    I have also added some testpoint

  15. medic4950#0

    but could’t fit them all

  16. medic4950#0

    here is the design

  17. medic4950#0

    image.png

  18. medic4950#0

    this is a testpoint
    image.png

  19. medic4950#0

    image.png

  20. medic4950#0

    image.png

  21. medic4950#0

    image.png

  22. medic4950#0

    in order to find the right size for the vias I’ve used the PCBtoolkit software

  23. medic4950#0

    here is the view of the software

  24. medic4950#0

    note that the value that you’re seeing is not the right one

  25. medic4950#0

    I’m a bit lazy today to re do the manipulation

  26. medic4950#0

    also I was wondering where should I put the resistor you mentioned

  27. medic4950#0

    I’ve also reviewed the design recommendations on the TI website for the copper trace sizes and calculated them accordingly.

  28. medic4950#0

    using the software

  29. medic4950#0

    I have found out that the signals should be .5mm

  30. medic4950#0
  31. medic4950#0

    another issue I’m facing Is that I didn’t set up the drc correctly so I have a lot of errors

  32. hemalchevli#0

    The pull up resistor on reset, you could place near the pin on IC

  33. medic4950#0

    Today, I tried to find a way to get straight signals by replacing the pins for Timer 1, but it seems impossible. I confirmed this using STM32 Cube.

  34. hemalchevli#0

    since you are using 4 layer with 2 gnd core layers, you can use as many vias as you need

  35. medic4950#0

    Really!?

  36. hemalchevli#0

    yes

  37. medic4950#0

    nice !

  38. medic4950#0

    Here is the final version of my board and I don’t think I can optimize it any further.

  39. medic4950#0
  40. medic4950#0

    image.png

  41. medic4950#0

    image.png

  42. medic4950#0

    image.png

  43. medic4950#0

    image.png

  44. medic4950#0

    image.png

  45. medic4950#0

    image.png

  46. medic4950#0

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