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I’ve been using FPGAs such as the Artix 7 to read the image data from peripherals and do processing, then display some output using LCD displays connected to FPGA I/O ports.
I’d like to transition to using Zynq SoC boards in order to store that processed image data using on-board RAM, and also making that image data accessible to the arm core (both directly from the FPGA and the RAM).
I think this involves creating a custom linux build that runs on the arm, something with AXI, then creating an application in C on the arm side.
Can anyone recommend a good tutorial running through all of this?
I am trying to stick with VHDL and Vivado as much as possible.
@Middleware & OS
If you want your FPGA to write data to the RAM memory of the processor system, then your FPGA must implement the DMA engine.
It can be easily done with HLS (see [https://docs.amd.com/r/en-US/ug1399-vitis-hls/AXI4-Master-Interface](https://docs.amd.com/r/en-US/ug1399-vitis-hls/AXI4-Master-Interface) and [https://github.com/Xilinx/Vitis-HLS-Introductory-Examples/blob/master/Interface/Memory/using\_axi\_master/example.cpp](https://github.com/Xilinx/Vitis-HLS-Introductory-Examples/blob/master/Interface/Memory/using_axi_master/example.cpp) ). In HDL it is more complicated.
If you want to know more, you may read [http://www.zynqbook.com/](http://www.zynqbook.com/).
Ok @enthernetcode Thanks 👍
This series targets Zynq – from bringup to using peripherals, using HDL and running simulations around the designed modules.
Thanks for the Recommendation @ngu25
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