Become a leader in the IoT community!
New DevHeads get a 320-point leaderboard boost when joining the DevHeads IoT Integration Community. In addition to learning and advising, active community leaders are rewarded with community recognition and free tech stuff. Start your Legendary Collaboration now!
@ucgee how about if you try considering HBM memory, it might suffice
Hey man @ucgee that’s a pretty hefty memory setup you’re aiming for with your FPGA. Standard DDR4 definitely wouldn’t cut it.
I don’t think there are commercially available modules that specifically combine CXL like capacity with FPGA friendly transceivers yet tho
You can workaround with HBM cus it has stacked DRAM layers on top of the FPGA, impressive bandwidth and capacity It might not be as spacious as CXL yeah, but it could get you closer to your target
Or use multiple DDR4 modules
Ohhh… thanks @marveeamasi
Let me try out HNM.
Ok @destynin Thanks for your recommendation 👍
CONTRIBUTE TO THIS THREAD